MOS transistor structure and device modeling, MOS Inverters, MOS Combinational Circuits, Device feature size scaling, Multi-Vdd Circuits, Dynamic voltage scaling, Power Management, Hardware Software Trade-off, Bus Encoding, Architectural optimization, Clock Gating, Logic styles, Variable-threshold-voltage CMOS (VTCMOS) approach, Multi-threshold-voltage CMOS (MTCMOS) approach, Power gating, Transistor stacking, Dual-Vt assignment approach (DTCMOS), Adiabatic Switching Circuits, Battery-aware Synthesis, Variation tolerant design, and Simulation tools for low power synthesis.