Frequency and voltage dependent of electrical and dielectric properties of 14 nm Fully Depleted Silicon-On-Insulator (FD-SOI)

Abstract
This study investigates the dielectric properties of a FD-SOI film (14 nm n-Si/25 nm SiO2/n-Si), fabricated using Smart Cut technology, where the reduced Si and SiO2 thicknesses play a crucial role in its electrical and dielectric response. Impedance spectroscopy was employed to characterize the real (ε′) and imaginary (ε′′) components of permittivity, dielectric losses (tan δ), and electric modulus (M∗), revealing distinct dielectric relaxation processes marked by characteristic peaks at low and high frequencies. These phenomena are attributed to slow interfacial polarization and fast dipole relaxation mechanisms, respectively. At low frequencies, dielectric losses are primarily influenced by charge trapping at the SiO2/n-Si interface, significantly modulated by the applied bias voltage. Increasing this voltage shifts the dielectric loss peak toward higher frequencies, indicating enhanced charge mobility and accelerated relaxation mechanisms. Additionally, the real part of the electric modulus increases with frequency, reflecting improved responsiveness to rapid variations in the applied electric field, while its amplitude decreases with higher bias, suggesting reduced charge transport efficiency at certain frequencies. This study highlights the critical role of bias voltage in modulating relaxation mechanisms and optimizing FD-SOI device performance, providing valuable insights into the electrical and dielectric properties of these advanced 14 nm FD-SOI films for microelectronic applications.