An Inversion-Coefficient Based Methodology for Optimizing the Performance of TIAs

The transimpedance amplifier (TIA) can be found in several
applications such as optical transceivers, biomedical circuits,
and signal-processing circuits. In this paper, an investigation of
two widely used transimpedance-amplifier configurations is
presented. The two adopted configurations are the regulated
cascode-based TIA (RGC-TIA) and the common-source based TIA
(CS-TIA) with resistive feedback. These two configurations are
studied in the following three inversion regimes; weak, moderate,
and strong. A general model for the drain current of the
MOSFET transistor, that is valid for all levels of inversion, is
adopted. Through the study, the inversion coefficient (IC) of
the amplifying device is systematically varied and its impact is
investigated on various performance metrics such as gain,
bandwidth, noise, distortion, and power consumption.
Studying the inversion coefficient is crucial for precisely adjusting
the amplifier biasing, thereby enabling the design of
enhanced performance TIAs that effectively address the requirements
of diverse applications. Compact-form expressions are
derived for the performance metrics and compared with the
simulation results. A figure of merit incorporating multiple performance
metrics is proposed for performing a fair comparison
for a wide range of the inversion coefficient. The simulation
employs the 130-nm CMOS Predictive Technology Model
(PTM) with a power-supply voltage, VDD, equal to 1.2 V.